1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal oxide silicon field effect transistor (MOSFET) and a method for fabricating the same.
2. Background of the Related Art
The reduction of the size of semiconductor devices results in high integration, especially the size of the transistors. Such a reduction reduces the channel lengths, which causes punch-through and increases leakage current between a source and a drain due to a shortened distance between the source and drain.
FIGS. 1A-1D illustrate processes for fabricating a MOSFET. Referring to FIG. 1A, after implanting channel ions into a surface of a first conductive type semiconductor substrate 11, an insulating film is formed on an entire surface of the semiconductor substrate 11 and then patterned to form a gate insulating film 12 on a channel region 17 of the semiconductor substrate 11. A polysilicon layer 13 for a gate electrode is formed on the gate insulating film 12. As shown in FIG. 1B, a photoresist (not shown) is coated on the polysilicon layer 13. The photoresist is subjected to an exposure process and a development process for patterning the photoresist to define a gate electrode region. The polysilicon layer 13 is selectively dry-etched using the patterned photoresist as a mask for dry-etching, thereby forming a gate electrode 13a.
Impurity ions are implanted into the semiconductor substrate 11 using the gate electrode 13a as a mask for ion-implantation, thereby forming LDD (Lightly Doped Drain) regions 14 in the surface of the semiconductor substrate 11 at both sides of the gate electrode 13a. Ions having the first conductivity, same as the channel are implanted vertically or tiltly, to form first conductive impurity regions 14a. The impurity regions 14a improve short channel characteristic.
As shown in FIG. 1C, an insulating film is formed on the entire surface of the substrate 11 including the gate electrode 13a and then etched-back to form insulating sidewalls 15 at both sides of the gate electrode 13a. When impurities ions are heavily implanted into the semiconductor substrate 11 using the insulating sidewalls 15 and the gate electrode 13a as masks for ion-implantation, impurity regions 16 are formed as a sources and a drain D, as shown in FIG. 1D.
However, the process for fabricating a MOSFET according to the background art has the following problem. When the impurity ions are implanted to form the halo regions for improving short channel characteristic, the impurity ions are implanted heavier at the edge portions than a center portion of the channel, thereby resulting in an increase of a threshold voltage and also changing the characteristic of a threshold voltage according to a length of the channel at the end.